1. Field of the Invention
The present invention generally relates to programmable structures for forming programmable connections in integrated circuit devices and, more particularly, to an antifuse structure for selectively forming connections between circuits and circuit elements in integrated circuit devices.
2. Description of the Prior Art
As the scale of integration has increased in the manufacture of integrated circuits, it has become economically necessary to provide redundant circuits in virtually all devices manufactured in order to preserve acceptable levels of manufacturing yield. Upon formation of the integrated circuit to certain levels of completeness, testing may be done and defective circuits disconnected by destroying a fusible link or fuse with a high level of current. A similar mechanism is employed in known "antifuses" such as that disclosed in U.S. Pat. No. 4,943,538 to Mobsen et al. where an insulator is destroyed in order to form a connection rather than to interrupt a connection, often accompanied by flow of molten conductive material at a high temperature. These practices, while widely employed have several significant drawbacks even though a substantial economic gain is realized.
The destruction of known fusible links and insulators in known antifuses inherently causes electrical, mechanical and thermal stressing of at least a portion of the integrated circuit and may also cause damage beyond the capability of current repair techniques. The thermal stressing may also initiate processes such as metal migration in other connectors or changes in transistor characteristics which compromise integrated circuit performance. Therefore, the relatively violent processes associated with fuses and, especially, antifuses may cause significant loss of manufacturing yield. Further, when the present state of the art provides only for the destruction of connections with acceptably low likelihood of chip damage, often complex arrangements may be required during integrated circuit design in order to insure that redundant structures will be connected when the fusible links are destroyed. Alternatively, redundant pinouts or address decoder modifications may be required in the same fashion that fusible links are destroyed to assure that redundant structure can be effectively and functionally substituted for the disconnected structure.
Further, electrical programming of fuses and antifuses may be difficult in some cases due to the difficulty of making connections to the integrated circuit chip to be modified. Often, different electrical connections must be made to the chip for each fuse or antifuse to be programmed. Further, to reduce the risk of damage to other circuit elements when the programmable element is destroyed, a relatively large "footprint" must be dedicated to the fuse in order to allow for temperature reduction through thermal conduction and heat dissipation in the vicinity of each fuse.
Additionally, in programming of fuses and antifuses, the process tolerances (e.g. operating margins for programming) are sufficiently small that programmable elements may not be completely destroyed when programming is done. The fuses also must be fabricated with a significant resistance and the difference in resistance between an intact fuse and a "destroyed" fuse may only be a few orders of magnitude (e.g. a factor of several hundred). Conversely, the delicacy of programmable elements in fuses and antifuses often allows programming to occur accidentally during electrical burn-in.